Tick-Tock Is Back: Intel Rewinds the Clock to Race Ahead

Year	Step	Chip	Process
2007	Tick	Penryn	45nm
2008	Tock	Nehalem	45nm
2010	Tick	Westmere	32nm
2011	Tock	Sandy Bridge	32nm
2012	Tick	Ivy Bridge	22nm, first FinFET
2013	Tock	Haswell	22nm
2014	Tick	Broadwell	14nm, late
2015	Tock	Skylake	14nm

Then it broke. 14nm arrived late and 10nm arrived years late. From 2016 Intel refreshed Skylake again and again while TSMC kept a steady yearly cadence and AMD used it to overtake. Much of what Intel is still repairing today started there.

The new tick-tock under Tan

The modern version has a different shape but the same philosophy. Each new process gets a refined follow-on before the next leap: 18A, then 18A-P, then 14A.

18A-P is a textbook tick-plus. On the July earnings call Tan said of it: “we see a 5% enhanced performance,” while Intel keeps IP and design compatibility with 18A. On the October call he confirmed that “Intel 18A-P remains on track for launch by year-end across our internal product portfolio,” with Nova Lake and Diamond Rapids built on it.

Chiplets make the rhythm safer than it ever was. Clearwater Forest puts new 18A compute tiles on top of proven Intel 3 base tiles. That is tick-tock inside a single package: the risky part is new, the foundation is known. Foundry chief Naga Chandrasekaran made the point about extending proven processes when announcing Intel’s €5 billion upgrade in Ireland: “we are not just increasing output of critical products like Xeon 6 and next gen Intel Xeon processors built on Intel 3, we are ensuring that Ireland remains at the forefront.”

Tan has also tied spending to proof, the discipline tick-tock always needed: “I don’t put CapEx unless I see the yield performance, the IP is ready to serve the customer, and also customer engagement.”

14A: the tick that matters

The next big tick is 14A, and Tan has been unusually specific about it. In July: “Defect density and transistor performance are all outpacing 18A development.” He added that he is “increasingly confident that the 14A will be highly competitive process offering across key vectors of performance, power, density, cost, and schedule.” Note the last word. Schedule is one of his five measures.

The milestones so far have landed. In October Tan said: “in October, as committed, we released our industry-standard 0.9 PDK to select customers.” Next comes PDK 1.0, which he expects “by Q1 next year,” then risk production in the second half of 2027 and volume production in 2028.

Intel versus TSMC to 2030

Year	Step	TSMC	Intel
2026	Tick	N2 and N2P in volume	18A in volume, with backside power; 18A-P launch by year-end
2027	Tock	A16, TSMC’s first backside power, slipped from 2026	18A-P products: Nova Lake, Diamond Rapids; 14A risk production
2028	Tick	A14, front-side power	14A volume, with High-NA EUV
2029	Tock	A13 shrink; A12 with backside power	14A-P, refined 14A, expected
2030	Tick	Sub-1nm node reported, not yet official	10A, about 1nm, expected

TSMC rows to 2029 are from its official April 2026 roadmap. Intel rows for 2029 and 2030 follow the tick-tock rhythm and the 10A node already on Intel’s roadmap; Intel has not yet given dates for them.

Three things stand out. First, Intel has shipped backside power delivery since 18A, while TSMC’s first version arrives with A16 in 2027 and its mainstream A14 and A13 nodes keep front-side power through 2029. Second, the two companies are making opposite bets on ASML’s High-NA EUV machines: Intel uses them on 14A, while TSMC plans to stay with current EUV through 2029. TSMC’s Kevin Zhang put it this way: “One day they may have to use it, but at this point, we continue to be able to harvest the benefit from current EUV.” Third, and most important, Intel 14A and TSMC A14 are both scheduled for 2028. For the first time in about a decade, Intel would bring a leading-edge node to market in the same year as TSMC. If the rhythm holds, the two meet again around 1nm in 2030.

“Within 5%” is the point

In September, Naga Chandrasekaran told KeyBanc that Intel expects 14A to perform “within 5%” of TSMC’s A14. Some read that as cautious. Intel’s own figures suggest it may be conservative: Intel projects 14A at 15% to 20% more performance than 18A at the same power, while TSMC projects A14 at 10% to 15% over N2.

But the real message is that a few percent is no longer the battle. Chip customers do not switch foundries for 5%. They look for a second source they can trust to deliver every year, at high yield, on schedule. That is exactly what tick-tock used to promise, and exactly what Tan keeps repeating with “as committed” and “on track.”

What to watch

• End of 2026: 18A-P launch, and the first external 18A-P customer.
• Q1 2027: 14A PDK 1.0.
• Next two quarters: Tan’s promise of “couple of customer ready to announce.”
• Second half of 2027: 14A risk production.
• 2028: 14A in volume, the same year as TSMC A14.
• 2029 and 2030: 14A-P, then 10A, if the rhythm holds.

The risks are real. TSMC rarely slips, its scale is far larger, and High-NA is a bet that has not yet been proven in volume. But the market paid Intel for predictability once before. Intel does not need to beat TSMC by 5%. It needs to show up on time, every year, the way it used to. That is what tick-tock was really about.

Sources: Intel Q2 2026 earnings call, July 23, 2026; Intel Q3 2026 earnings call, October 29, 2026; Intel press release on the Leixlip investment, July 13, 2026; Tom’s Hardware on Intel 14A versus TSMC A14, September 25, 2026; Tom’s Hardware on TSMC’s roadmap through 2029, April 22, 2026. Not investment advice.