A working map of every Intel Corporation (NASDAQ: INTC) product line and roadmap item through 2030: process nodes and fabs, client CPUs, Xeon server chips, AI accelerators, advanced packaging, memory projects, foundry customers, the APX instruction set, quantum and Altera. Each item carries a label for how solid it is. Updated after every earnings call; this version includes the Q3 2026 call of October 29, 2026.
How to read the labels
- Confirmed: stated by Intel on a call, in a filing or a keynote, or a shipping product
- Reported: mainstream press or analysts citing sources; not confirmed by Intel
- Leak: benchmarks, shipping manifests, driver code or social media; treat with caution
- Estimate: Blue Team’s own projection, with the reasoning shown
What changed on the Q3 2026 call
- Nova Lake is on Intel 18A-P. Intel called it “our first Intel 18A-P client product”, tracking ahead of schedule, with design wins expected at twice Panther Lake’s at launch. Earlier reports had the top compute tiles at TSMC.
- Wildcat Lake is confirmed and sold out. Units up about 70% quarter on quarter; demand is outstripping supply.
- Clearwater Forest is shipping for revenue on 18A. Diamond Rapids is sampling and on track to ramp in 2027. Coral Rapids is expected in 2028 on 14A.
- 14A: the 0.9 PDK was released to select customers in October; PDK 1.0 is expected in Q1 2027; risk production in 2027; production in 2028. Multiple potential customers, none named by Intel.
- Fabs: Fab 62 in Arizona is named as the second high-volume 18A fab. Intel 3 tooling is going into Ireland and into Oregon, where it replaces some 18A wafer capacity. Ohio passed a construction milestone, and Intel is evaluating ways to accelerate it.
- Oracle was confirmed on the call, and Intel said several other customers want long-term supply agreements for CPUs.
- Classiq acquisition is in the 10-Q as a definitive agreement signed in October 2026.
- 2027 is an investment year, not a free-cash-flow year, as 18A and Intel 3 ramp and 14A is prepared.
Process nodes
| Node | Technology | Status | Timing | Main products |
|---|---|---|---|---|
| Intel 7 | FinFET, 10nm class | Confirmed, mature | In production | Raptor Lake, Clearwater Forest I/O tiles, Fab 28 server parts |
| Intel 4 / Intel 3 | EUV FinFET | Confirmed | In production (Ireland); more tooling going into Ireland and Oregon | Granite Rapids, Sierra Forest, Clearwater Forest base dies, AWS custom Xeon 6 |
| 18A | RibbonFET gate-all-around + PowerVia backside power | Confirmed, high volume | HVM in Arizona Fab 52; Fab 62 next | Panther Lake, Wildcat Lake, Clearwater Forest compute tiles |
| 18A-P | Performance version of 18A, about 9% more performance at the same power | Confirmed | Products ramp 2027 | Nova Lake, Diamond Rapids; reported Apple M-series |
| 18A-PT | 18A-P with through-silicon vias for 3D stacking | Confirmed | 2026–27 | Base dies for stacked chips |
| 14A | Second-generation RibbonFET, PowerDirect, High-NA EUV | Confirmed | PDK 0.9 Oct 2026; PDK 1.0 Q1 2027; risk production 2027; production 2028 | Coral Rapids; external customers (Tesla per Elon Musk; others unnamed) |
| 10A / 7A | Future nodes | Named only | No dates | — |
Fabs and factories
| Site | Role | Status |
|---|---|---|
| Fab 52, Arizona | 18A high-volume manufacturing | Confirmed, ramping |
| Fab 62, Arizona | Second high-volume 18A fab, later 14A | Confirmed; tool installation under way. Owned through the Arizona joint venture with Brookfield (51% Intel) |
| Oregon | Development fab; 18A, with Intel 3 tooling being added in 2027 for Xeon demand | Confirmed on Q3 call |
| Fab 34, Ireland | Intel 4 / Intel 3; tooling expansion in progress | Confirmed. Intel bought back Apollo’s 49% stake in April 2026 |
| Fab 28, Israel | Intel 7 server parts | Operating; restarting after the October 2026 accident. About $300M Q4 revenue impact (see Earnings) |
| Ohio | Future leading-edge site | Confirmed; first major structural truss installed; Intel evaluating options to accelerate. No production date |
| New Mexico | Advanced packaging (Foveros) | Confirmed, operating |
| Penang, Malaysia | Advanced-packaging complex, set up for EMIB-T | Reported about 99% complete; phase 1 in 2026 |
Client CPUs: laptops
| Product | What it is | Status | Timing |
|---|---|---|---|
| Panther Lake (Core Ultra Series 3) | First high-volume client chip on 18A. Cougar Cove P-cores, Darkmont E-cores, Xe3 graphics; GPU tile on larger SKUs made at TSMC N3E. 400+ laptop designs cited by Intel. Intel says the cost of the main SKU fell about 50% this year as yields improved | Confirmed, shipping | Launched CES 2026 |
| Wildcat Lake | Cost-optimised 18A chip for entry and mainstream laptops; up to 4 P-cores + 4 low-power E-cores, 10–35W | Confirmed, shipping, sold out | Units +70% in Q3 2026; refresh rumoured 1H 2027 (leak) |
| Moon Lake | 4 low-power E-cores, no P-cores, 6–15W, 18A; for sub-$400 laptops and Chromebooks | Leak | Not given |
| Nova Lake-HX | Up to 28 cores for gaming laptops, from the desktop Nova Lake design | Leak | 2027, after desktop |
| Serpent Lake | Intel x86 CPU with an NVIDIA RTX GPU chiplet in one package, from the Intel–NVIDIA partnership | Leak (partnership itself is confirmed) | Q1 2028 rumoured |
| Razor Lake / Razor Lake-AX | Successor to Nova Lake; AX is a large-integrated-GPU version | Leak | Q4 2027 / 2028 rumoured |
| Titan Lake / Hammer Lake | Later generations, possibly a unified-core design | Leak | 2028+ |
Client CPUs: desktops
| Product | What it is | Status | Timing |
|---|---|---|---|
| Arrow Lake Refresh | Clock-speed refresh of Core Ultra 200S on LGA1851 (Core Ultra 7 270K Plus, Core Ultra 5 250K Plus) | Confirmed, shipping | Now |
| Raptor Lake Next | Value desktop on the old LGA1700 socket, Intel 7, DDR4 and DDR5. Up to 8P+12E, 65–125W. Fits a market where DDR5 is expensive and Intel 7 capacity is cheap | Leak (supported by a driver reference) | H1 2027 rumoured |
| Nova Lake-S (Core Ultra 400) | New LGA1954 platform. Leaks: up to 28 cores per tile, 52 cores dual-tile, up to 288MB last-level cache, APX and AVX10.2. Intel: first 18A-P client product, ahead of schedule, design wins twice Panther Lake’s | Confirmed in outline; specs are leaks | Around CES / Q1 2027; 52-core flagship mid-2027 (reported) |
| Razor Lake | Next desktop step, likely same socket | Leak | Q4 2027 rumoured |
Early benchmark (leak): a 24-core Nova Lake engineering sample scored 5,210 single-thread in PassMark, already ahead of today’s Core Ultra 9 285K (5,087). Retail chips usually clock 5–10% higher than engineering samples, so a retail flagship could land around 5,500–5,700 (Blue Team estimate). Apple still leads single-thread; AMD’s Zen 6 is the real fight in 2027.
Data-centre CPUs: Xeon
| Product | What it is | Status | Timing |
|---|---|---|---|
| Xeon 6: Granite Rapids and Sierra Forest | P-core and E-core parts on Intel 3; today’s server volume. Supply-constrained through 2026 as AI head nodes and cloud demand grew | Confirmed, shipping | Now |
| Clearwater Forest (Xeon 6+) | First Xeon on 18A. Up to 288 Darkmont E-cores, 576MB L3, 12 compute chiplets on 18A stacked on Intel 3 base dies with Foveros Direct, I/O on Intel 7, 12-channel DDR5-8000, 300–500W. Intel showed racks beyond 46,000 cores at about 133 kW | Confirmed, shipping for revenue | Launched Q2 2026 |
| Diamond Rapids (Xeon 7) | First 18A-P server chip. About 192 P-cores shown at Computex (leaks say up to 256), 16-channel MRDIMM, PCIe 6.0, no hyper-threading, AMX with FP8/FP16/BF16, APX. Oracle’s planned OCI X14 instances are expected to use it | Confirmed; sampling | Ramp 2027 |
| Coral Rapids | On 14A; brings back hyper-threading; Intel says it will be competitive with AMD | Confirmed name and node | 2028 |
| NVIDIA custom Xeon | x86 CPU that connects directly into NVIDIA’s NVLink fabric; part of NVIDIA’s $5B investment | Confirmed | Products 2027–28 |
| AWS custom Xeon 6 and AI fabric chip | Custom Xeon 6 on Intel 3; custom fabric chip on 18A | Confirmed | Shipping / ramping |
AI accelerators and GPUs
AI has been Intel’s weakest area: Gaudi 3 missed its 2024 target and Falcon Shores was cancelled as a product. The reset is a yearly GPU cadence focused first on inference.
| Product | What it is | Status | Timing |
|---|---|---|---|
| GPU D-Series D270 (Crescent Island) | Xe3P, 32 Xe cores, 160GB LPDDR5X (partner cards up to 480GB), about 1.5 TB/s, about 1.3 PFLOPS FP8, 350W air-cooled PCIe card. Large memory at low cost and power, but far less bandwidth than HBM parts; suited to the decode side of inference. Dell, HPE, Lenovo, Supermicro and ASUS as server partners | Confirmed; sampling since OCP Summit, Oct 12, 2026 | Broad availability 2027 |
| Jaguar Shores | Rack-scale AI system; next-generation Xe architecture, 18A compute, HBM4/HBM4E, silicon photonics | Confirmed name; details reported | Late 2027 (leak) |
| Arc Pro B50 / B60 / B70 | Battlemage workstation GPUs; popular as low-cost local-AI cards | Confirmed, shipping | Now |
| Consumer gaming GPUs | Discrete “Celestial” cards reportedly cancelled; Xe3 lives on in integrated graphics; Xe4 “Druid” rumoured | Reported | Late 2027 rumoured |
Advanced packaging and interconnect
| Technology | What it does | Status |
|---|---|---|
| EMIB | Small silicon bridge embedded in the substrate to link chiplets side by side | Confirmed, high volume (Xeon, FPGAs, Panther Lake) |
| EMIB-T | EMIB with through-silicon vias; suited to HBM-heavy AI chips. Intel says the backlog is growing; Penang is being set up for it; Amkor is qualified for EMIB packaging | Confirmed; progressing on internal products |
| Foveros | 3D stacking of a die on a base die | Confirmed (Meteor, Lunar, Panther Lake) |
| Foveros Direct | Copper-to-copper hybrid bonding for much denser 3D links | Confirmed, in production (Clearwater Forest) |
| Glass substrates | Replace organic substrates for larger, flatter packages | Confirmed R&D; around 2030 |
| Optical compute interconnect | Silicon-photonics chiplet for light-based links between chips | Confirmed, demonstrated; expected in Jaguar Shores-class systems |
| UCIe / UALink | Open standards for die-to-die links and accelerator links | Confirmed member |
Why it matters: packaging is the part of Intel Foundry that outside customers are buying first, often for chips made at TSMC. EMIB uses small bridges only where chiplets meet, so very large packages are cheaper than TSMC’s CoWoS interposers. The trade-off is that CoWoS is the proven standard for NVIDIA and AMD; EMIB-T still has to win a flagship AI design. Intel’s substrate agreements total $5.3–6.1B, with $3.3B paid by end-2027, and the CFO has said Intel is adding about 40% more substrate capacity.
Memory projects
| Project | What it is | Status | Timing |
|---|---|---|---|
| ZAM / HB3DM with Saimemory (SoftBank) | Stacked DRAM as a lower-power alternative to HBM: 9 layers, about 5.3 TB/s per 10GB module. Pilot production with PSMC and Shinko; Japan’s METI providing ¥3.8B | Confirmed partnership | Prototype FY2027; commercial FY2029 |
| XBM | DRAM layers built directly above logic, connected over UCIe | Patent only | 2030+ at the earliest |
| HBM4E base dies | HBM4/4E move the base die to a logic process; SK hynix reported to be weighing Intel for some base dies | Reported | Open |
In June 2026 Intel hired Seok-Hee Lee, former CEO of SK hynix, as executive vice president of Intel Foundry to lead advanced packaging. Intel is coming back to memory through partnerships and foundry work, not by building DRAM fabs.
Foundry customers and partners
| Partner | What | Status | Timing |
|---|---|---|---|
| Oracle | Multiyear collaboration to expand Xeon on OCI; planned X14 instances expected to use Diamond Rapids | Confirmed (Oct 27, 2026) | 2027+ |
| NVIDIA | $5B equity stake; custom NVLink Xeons; x86 + RTX PC chips | Confirmed | Products 2027–28 |
| AWS | Custom Xeon 6 (Intel 3) and AI fabric chip (18A) | Confirmed | Shipping / ramping |
| Microsoft | 18A foundry customer for a custom chip | Confirmed (2024) | — |
| Tesla | Elon Musk said in April 2026 that Tesla will use 14A for its AI chips at the planned Terafab in Austin. Intel has not named Tesla; on the Q3 call it spoke only of “multiple potential customers” on 14A | Confirmed by Musk, not by Intel | 14A production 2028 |
| Apple | Preliminary deal for M-series chips (M7) on 18A-P reported by the WSJ in May 2026; iPhone chips on 14A rumoured later. Neither company has confirmed it | Reported | M7 reported 2027; iPhone rumoured 2028 |
| SambaNova | Reported ~9% Intel stake; joint prefill/decode inference designs with the D270 | Reported | Now |
| AMD | Lip-Bu Tan discussed AMD using Intel Foundry at a fireside chat in October 2026 | Reported / discussed | Open |
| Custom silicon | Network processors for hyperscalers, security chips for Fortinet, telecom silicon for Ericsson. Intel says the business is approaching a $2B run rate, with a $4B target | Confirmed | Ongoing |
Why Apple matters most: Apple moves very large volumes, has the strictest quality bar in the industry and has been TSMC’s anchor customer for a decade. Even a partial move of M-series chips to 18A-P would tell every other chip designer that Intel’s process is ready. Blue Team estimate: M7-class Mac chips could be worth roughly $0.7–1.5B a year in foundry revenue; a quarter of iPhone processor volume on 14A roughly $2.5–3B a year. Both depend on the reports being right.
Instruction set: APX and AVX10.2
APX is the biggest change to x86-64 in two decades: 32 general-purpose registers instead of 16, a new data destination so instructions can write to a third register, and more conditional instructions. Intel’s simulations show about 10% fewer loads and over 20% fewer stores. GCC and LLVM already support it; Microsoft added an APX toggle in a Windows Insider build in October 2026; AMD agreed in May 2026 to standardise APX through the x86 Ecosystem Advisory Group. Hardware arrives with Nova Lake and Diamond Rapids. AVX10.2 unifies vector instructions across P-cores and E-cores, ending the AVX-512 split on hybrid chips. Expect modest gains as software is recompiled, not a jump at launch.
Quantum
Intel’s approach uses silicon spin qubits made with normal transistor processes. Milestones: the 12-qubit Tunnel Falls chip (2023), an 18A quantum PDK (April 2026), reported cloud access with Hitachi and Japan’s AIST in 2027, about 100 qubits in 2028 and about 1,000 in 2030 (reported roadmap). In October 2026 Intel signed a definitive agreement to acquire Classiq, an Israel-based quantum software company whose platform works across many types of quantum hardware; reported price about $2.2–2.3B in cash and stock, closing expected H1 2027. Revenue will be small for years; the value is positioning.
Altera: Agilex 27
Altera is now independent; Intel kept 49%. Its new high-end FPGA family targets networking and AI infrastructure: hardened 800GbE and 1.6TbE, 256 Gbps transceivers, PCIe Gen 6/7, LPDDR6, UCIe chiplet links. Samples H2 2027, about 18 months behind AMD’s Versal Premium Gen 2, which matters because FPGA design wins lock in for years. Blue Team estimate: peak annual revenue of roughly $1–1.8B once it ramps, most likely 2029–30.
Master timeline, 2026–2030
| When | What | Status |
|---|---|---|
| Q4 2026 | Panther Lake and Wildcat Lake volume; Clearwater Forest revenue ramp; D270 sampling; Fab 28 restart; Q4 results around Jan 28, 2027 | Confirmed |
| Q1 2027 | Nova Lake-S launch around CES; 14A PDK 1.0; Classiq close (H1) | Confirmed / reported |
| 2027 | Diamond Rapids ramp; D270 broad availability; 14A risk production; Intel 3 tooling in Oregon (2H); Fab 62 ramp; Agilex 27 samples (H2); Apple M7 on 18A-P (reported); Jaguar Shores (late, leak); Razor Lake (Q4, leak) | Mixed |
| 2028 | Coral Rapids on 14A; 14A production; Serpent Lake (Q1, leak); Razor Lake-AX (leak); iPhone chips on 14A (rumour); ~100 qubits (reported) | Mixed |
| 2029–2030 | ZAM commercial memory (FY2029); Agilex 27 peak ramp; glass substrates (~2030); ~1,000 qubits (reported); 10A/7A nodes undated | Reported / estimate |
What to watch next: independent Clearwater Forest reviews; D270 benchmarks from server partners; Nova Lake retail timing at CES 2027; 14A PDK 1.0 and the first customer Intel names itself; any official word from Apple or Intel on a foundry deal; the Q4 2026 call around January 28, 2027.
Sources: Intel Q3 2026 earnings call (Oct 29, 2026) and Form 10-Q; Intel Q2 2026 Form 10-Q; Intel keynotes and releases (CES 2026, Computex 2026, OCP Global Summit Oct 12, 2026); Intel–Oracle announcement (Oct 27, 2026); Reuters on Elon Musk’s 14A remarks (Apr 22, 2026); Intel’s June 2026 appointment of Seok-Hee Lee; Classiq and Altera announcements; Saimemory/METI disclosures; press reports (ServeTheHome, TrendForce, Tom’s Hardware, VideoCardz) and PassMark listings for leaks. Last updated November 1, 2026.
